If you are a senior leader with expertise in GPU technologies and Engineering (architecture, IP, SoC, software) and are passionate about defining the future of graphics computing and AI, Intel has opportunities for you.
The Client Graphics, GPU IP, and AI (CGAI) group is responsible for delivering industry-leading GPU IP (3D, media, display, compute) to all of Intel's business units and their market segments, including for the client, high-performance computing and AI, and edge computing. CGAI is also responsible for the development of specialized IP for the NPU (neural processing unit) and AI model deployment across Intel's hardware for the AI PC. Additionally, all aspects of client graphics engineering and management of the Intel Arc graphics portfolio and business are included within the purview of CGAI.
CGAI is part of the Client Computing Group (CCG), the business unit responsible for the full portfolio of client technologies and platforms designed to enable exceptional personal computing experiences.
The DFT Principle Engineer's responsibilities include (but are not limited to):
* Lead the product DFT Architecture for the future Intel ARC discrete graphics SoC
* Drive DFT technical readiness (TR) and define DFT strategy to meet the Intel Manufacturing requirements
* Provide technical mentorship and support to the DFT engineering teams. Work with the team to define DFT quality control/process for SoC execution predictability and high quality DFT delivery to achieve the "first-time-right" goals
* Improve overall product cost by analyzing product requirement to balance DFT/Manufacturing requirements vs products' PPA and cost
* Support critical post-Si debug and yield/Vmin analysis as required
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Bachelors Degree in Electrical/Computer Engineering or related STEM degree plus 10+ years of industry experience in the following:
* Expert in industry standard DFT (TAP/JTAG, MBIST, SCAN/ATPG)
* Experienced in DFT product architecture/micro-architecture with end-to-end DFT design and verification flow knowledge from DFT technical readiness (TR) to product PRQ support
* Experienced with EDA tools such as ATPG tools, Siemens Tessent shell, VCS simulation and/or debug tools, Prime time and DFTC and/or similar tools
*Understand the "best known method" to integrate IP from internal and/or external vendors, such as IO PHY and PLL
* Experienced in DFT pattern generation flow, post-Si debug and yield analysis
* Strong leadership and mentorship and be able to lead cross-site initiatives/WG with key stakeholders and customers
Preferred Qualifications:
* Familiar with Intel manufacturing and test flow
* Familiar with GPU, Media and Display architecture and design flow
*Familiar with Intel SoC Architecture and design flow
Work Model for this Role
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