General Summary:
Qualcomm's Low power AI sub system (LPAI) engineers will work on next generation low power, machine Learning sub-system for our system-on-chip (SoC) products used in Smartphone, Automotive and other low power devices. Become a key member of the core team developing fastest smartphone SoC devices implemented on the latest cutting-edge process technologies. The team is responsible for power analysis, budgeting, estimation, and optimization of all LPAI use cases. We are looking for a Senior Engineer with experience in low power HW design and expertise in Industry standard Power estimation and optimization tools. Your work will have the potential to shape the most power efficient devices in the hands of millions of Snapdragon users.
Responsibilities of this role include:
Creating power spec for based on the design spec
Power intent development using UPF based on power spec
Power intent validation at RTL level , Gate level (synthesis , PD ) using CLP
Fixing power intent based on PA DV feedback for any issue related to power intent
Debugging issues related to MV cell insertion during synthesis and modifying UPF accordingly
Dynamic and Leakage power projection during starting of the project
Dynamic and Leakage power no. generation using PTPX and tracking the same at different stages of implementation flow
Highlighting issues related to dynamic and leakage power mismatch compared to the target and working with Synthesis and PD teams to fix the issues
Working with cross function teams (SOC, Sub System etc) for smooth handoff of power intent and Dynamic & leakage power no. at different stages of project execution
Minimum Qualifications
Bachelor's degree in Computer Engineering, Computer Science, Electrical/Electronics Engineering, or related field and 4+ years of industry experiences in the following areas:
Or
Master's degree in Computer Engineering, Computer Science, Electrical/Electronics Engineering, or related field and 3+ years of industry experiences in the following areas:
Hands on experience in writing UPF based on power spec for block/SOC having complex power crossings
Hands on experience in validating power intent using CLP
Hands on experience on Power analysis using PTPX
Understanding on issues related to MV cell (isolation, level shifter, retention etc) insertion during synthesis
Good understanding on optimization of dynamic & leakage power during RTL development and physical implementation
Good understanding on power correlation between Pre-Si and Post-Si
Automation skill in TCL and/or Perl, knowledge in makefile flows.
Good communication skill
Preferred Qualifications - Any prior work on integration or RTL design, low power architecture is considered plus. - Candidates should have excellent analytical and problem solving skills.
Minimum Qualifications:
Preferred Qualifications:
• Master's degree in Computer Science, Engineering, Information Systems, or related field.
• 3+ years of Hardware Engineering or related work experience.
• 2+ years of experience with circuit design (e.g., digital, analog, RF).
• 2+ years of experience utilizing schematic capture and circuit simulation software.
• 2+ years of experience with hardware design and measurement instruments such as oscilloscopes, spectrum analyzers, RF tools, etc.
Principal Duties and Responsibilities:
• Applies Hardware knowledge and experience to plan, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems.
• Integrates features and functionality into hardware designs in line with proposals or roadmaps.
• Conducts simulations and analyses of designs as well as implements designs with the best power, performance, and area.
• Collaborates with teams (e.g., design, verification, validation, software and systems engineering, architecture development teams, etc.) to implement new requirements and incorporate the latest test solutions in the production program to improve the yield, test time, and quality.
• Evaluates, characterizes, and develops the manufacturing solutions for leading edge products in processes and bring-up product to meet customer expectations and schedules.
• Evaluates reliability of materials, properties, and techniques and brings innovation, automation, and optimization to maximize productivity.
• Assists in the assessment of complex design features to identify potential flaws, compatibility issues, and/or compliance issues.
• Writes detailed technical documentation for Hardware projects.
Level of Responsibility:
• Works independently with minimal supervision.
• Decision-making may affect work beyond immediate work group.
• Requires verbal and written communication skills to convey information. May require basic negotiation, influence, tact, etc.
• Tasks require multiple steps which can be performed in various orders; some planning, problem-solving, and prioritization must occur to complete the tasks effectively.
Applicants: If you need an accommodation, during the application/hiring process, you may request an accommodation by sending email toaccommodationsupport
Although this role has some expected minor physical activity, this should not deter otherwise qualified applicants from applying. If you are an individual with a physical or mental disability and need an accommodation during the application/hiring process, please call Qualcomm’s toll-free number found herefor assistance. Qualcomm will provide reasonable accommodations, upon request, to support individuals with disabilities as part of our ongoing efforts to create an accessible workplace.
Qualcomm is an equal opportunity employer and supports workforce diversity.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
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