This role is for one of the Weekday's clients Min Experience: 3+ years Location: Bengaluru JobType: full-time We are seeking a highly skilled Standard Cell Library Characterization Engineer to join our semiconductor design team.
The ideal candidate will have strong expertise in standard cell library characterization, timing and power analysis, and library quality validation.
In this role, you will be responsible for generating, validating, and maintaining high-quality standard cell libraries that enable successful ASIC and SoC implementation across advanced technology nodes.
You will collaborate closely with circuit design, CAD, physical design, and verification teams to ensure that characterized libraries meet performance, power, area, and reliability requirements.
As a Standard Cell Library Characterization Engineer, you will work with industry-standard characterization tools to create accurate timing, power, and noise models while ensuring compliance with foundry and customer requirements.
The role requires strong analytical skills, attention to detail, and a deep understanding of semiconductor library development methodologies.
Key Responsibilities Perform characterization of standard cell libraries for multiple technology nodes using industry-standard characterization tools.
Generate and maintain timing, power, leakage, and noise models for standard cell libraries.
Utilize Liberate or PrimeLib to perform comprehensive library characterization and generate production-quality library deliverables.
Execute library QA and validation to ensure consistency, completeness, and accuracy of characterization data.
Identify, analyze, and resolve characterization issues related to timing, power, functionality, and signal integrity.
Develop and maintain characterization flows and automation scripts to improve productivity and reduce turnaround time.
Collaborate with circuit designers to understand cell behavior and resolve characterization discrepancies.
Validate characterized libraries using QA methodologies and ensure compliance with foundry specifications and EDA tool requirements.
Support library releases by preparing documentation, validation reports, and quality metrics.
Work closely with CAD, design, and physical implementation teams to address library-related issues during design closure.
Contribute to process improvements, characterization methodologies, and automation initiatives for enhanced library quality.
Required Skills Strong hands-on experience in Standard Cell Library Characterization .
Practical expertise with Liberate or PrimeLib for timing and power characterization.
Solid experience in library QA/validation , including timing, power, functionality, and consistency checks.
Good understanding of Liberty (.
lib) file generation and validation methodologies.
Familiarity with characterization concepts including timing arcs, power models, leakage, and noise characterization.
Knowledge of semiconductor device behavior and digital standard cell architecture.
Experience working with advanced technology nodes is preferred.
Familiarity with scripting languages such as Tcl, Perl, Python, or Shell for automation is an advantage.
Strong debugging, analytical, and problem-solving skills.
Excellent communication and collaboration abilities.
Preferred Qualifications Bachelor's or Master's degree in Electronics, Electrical Engineering, VLSI, Microelectronics, or a related field.
Experience supporting ASIC or SoC library development projects.
Understanding of EDA tools and digital implementation flows.
Exposure to library release management and characterization automation is desirable.
