Job Details:Job Description: Defines, develops, and performs functional validation for integrated SoCs, focusing on validation of IP integration, interaction between IPs, and systemlevel features. Applies various hardware and software level tools and techniques to ensure validation coverage and that performance, power, and area goals are met. Reviews proposed design changes to assess impact on validation plans, tasks, and timelines. Develops SoC validation methodologies, validation test plans, executes validation plans, and collaborates with other engineers for design optimization, troubleshooting, and failure analysis. Performs silicon debug to identify root causes and resolves all functional and triage failures for SoC issues. Tests interactions between various SoC features using validation infrastructure. Develops postsilicon validation infrastructure (e.g., performance monitors, behavioral checkers, state space coverage) and test environment used in validation testing. Publishes SoC validation reports summarizing all validation activities performed, reviews results, and communicates to relevant teams. Works with architecture, design, verification, board, platform, and manufacturing teams to maintain and improve debug, validation test strategy, methodologies, and processes for SoC interfaces and to meet desired product specifications. Develops content to create or increase specific IP interactions using a variety of tools and techniques (including patching techniques using microcode, firmware, or custom OS builds). Engages in all phases of the product life cycle and develops and validates content, infrastructure, and bug hunts in multiple environments (e.g., simulation, emulation, FPGAs) to ensure silicon readiness.
Qualifications:Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
? Knowledge of CPU Architectures like RISC-V, x86 and ARM
? Knowledge of PCIe Express, UART, I2C, SPI, USB, Ethernet, NoC (Network on a Chip), and DDR5/HBM memory subsystems. Good OS Concepts is plus
? Knowledge of Pre-silicon Design, Validation and Debug flows of CPU/SOC is a plus
? Experience in C/C++/Python SW and Assembly programming for content development and scripting.
? Define, develop and perform functional validation for CPUs, focusing on validation of the CPU internals and CPU integration in system-level features
? Experience with PSS (Pre Silicon Systems) platforms FPGAs, In-Circuit Emulators
? Experience with PSS/post-silicon debug tools using ITP/JTAG, Logic Analyzers and Oscilloscopes.
? Powering on the very first system built with Intel's latest and greatest techniques.
? Debug efforts for issues found during PSS, Power-On, Post-silicon, Customer engagement to product release.
? Apply various hardware and software level tools and techniques to ensure validation coverage and power and performance goals are met.
? Publish CPU validation reports summarizing all validation activities performed, results, and communicate to relevant teams.
? Good Team Player. Candidate should have excellent interpersonal skills, as well as good written and verbal communication skills.Job Type:Experienced HireShift:Shift 1 (India)Primary Location: India, HyderabadAdditional Locations:Business group:As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
