This role is part of the Kinara Group at NXP Semiconductors, combining the agility and innovation of a startup with the scale, stability, and global reach of a leading semiconductor company.

Kinara was founded on patented technology developed during the founders’ Ph.D. research at Stanford University, with a mission to redefine AI inference at the edge through tightly integrated hardware and software. Following Kinara’s acquisition, this mission continues within NXP, with the Kinara team operating as a dedicated AI accelerator and software group focused on pushing the boundaries of edge AI.

The team has delivered two generations of AI silicon shipping in volume, supported by a mature and production‑ready software stack, making it one of the most proven edge AI platforms in the industry. Kinara technology is used by marquee customers, including GAFA‑class companies, a leading global e‑commerce provider, and Tier‑1 PC OEMs.

As part of NXP, the Kinara Group now benefits from world‑class silicon execution, manufacturing scale, and customer access, while retaining its startup culture, deep AI expertise, and compiler‑driven engineering mindset. Joining this team offers the best of both worlds: the opportunity to work on cutting‑edge AI compiler and silicon technology, with real‑world impact and long‑term stability.

We build game‑changing edge AI solutions that enable faster, smarter, and more power‑efficient decision making where every millisecond matters.

At the core of our platform are Ara AI inference processors, purpose‑built to deliver unrivaled deep learning performance per watt at the edge. Paired with our comprehensive SDK and software toolchain, these processors enable developers to deploy and optimize complex AI models for real‑time inference under tight latency and power constraints.

Kinara’s hardware–software co‑design approach allows high‑performance AI to be seamlessly embedded into edge devices, enabling applications across vision, industrial automation, consumer electronics, and intelligent systems. Our solutions focus on performance, efficiency, and scalability, helping customers bring advanced AI capabilities out of the cloud and into the real world.

Edge AI is at an inflection point, and the Kinara Group within NXP is uniquely positioned to play a leading role in its growth, delivering production‑proven silicon, a robust compiler and SDK stack, and a clear roadmap for next‑generation intelligent edge devices.

We are looking for an experienced Front-End Compiler Engineer with 10+ years of experience to lead the design and development of our AI/ML compiler front-end. The role focuses on building scalable model conversion pipelines that translate models from ONNX, TensorFlow, and PyTorch into our internal Intermediate Representation (IR).

The ideal candidate will have deep expertise in compiler design, graph-based optimizations, machine learning frameworks, and modern AI architectures including Transformers and Large Language Models (LLMs). You will collaborate with compiler backend, runtime, performance, and hardware teams to deliver a high-performance and production-ready AI compiler stack.

• Design and develop compiler front-end architecture and model conversion frameworks.
• Build and maintain Python-based converters for ONNX, TensorFlow, and PyTorch.
• Implement graph construction, graph transformation, IR lowering, and optimization pipelines.
• Develop graph optimization passes including operator fusion, canonicalization, simplification, and decomposition.
• Design scalable pattern-matching and graph-rewrite frameworks.
• Enable support for modern AI architectures such as CNNs, Transformers, and LLMs.
• Drive validation, testing infrastructure, regression testing, and CI/CD integration.
• Debug and resolve issues across model conversion, optimization, and IR generation stages.
• Provide technical leadership, mentor engineers, and collaborate across teams.

• 10+ years of experience in compiler development, ML systems, or AI infrastructure.
• Strong Python programming and software architecture skills.
• Deep understanding of:
  • Intermediate Representations (IRs)
  • Graph-based computation models
  • Compiler transformations and optimizations
  • Pattern matching and graph rewriting
• Hands-on experience with ONNX, TensorFlow, and PyTorch.
• Experience in graph parsing, graph transformations, and ML model optimizations.
• Strong understanding of CNNs, Transformers, and LLM architectures.
• Excellent debugging, problem-solving, and technical leadership skills.

• Experience with MLIR, TOSA, StableHLO, or Torch-MLIR.
• Familiarity with AI compiler stacks such as IREE, TVM, XLA, TensorRT, or ONNX Runtime.
• Experience targeting GPUs, NPUs, DSPs, or custom AI accelerators.
• Knowledge of quantization, model optimization, and deployment workflows.

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