Submitting more applications increases your chances of landing a job.

Here’s how busy the average job seeker was last month:

Opportunities viewed

Applications submitted

Keep exploring and applying to maximize your chances!

Looking for employers with a proven track record of hiring women?

Click here to explore opportunities now!
We Value Your Feedback

You are invited to participate in a survey designed to help researchers understand how best to match workers to the types of jobs they are searching for

Would You Be Likely to Participate?

If selected, we will contact you via email with further instructions and details about your participation.

You will receive a $7 payout for answering the survey.


User unblocked successfully
https://bayt.page.link/At9CJeymEQ2861Ys9
Back to the job results

Processor Coherency Architect

3 days ago 2026/10/25
IT Services
Create a job alert for similar positions
Job alert turned off. You won’t receive updates for this search anymore.

Job description

Introduction

At IBM Infrastructure & Technology, we design and operate the systems that keep the world running. From high-resiliency mainframes and hybrid cloud platforms to networking, automation, and site reliability. Our teams ensure the performance, security, and scalability that clients and industries depend on every day. Working in Infrastructure & Technology means tackling complex challenges with curiosity and collaboration. You'll work with diverse technologies and colleagues worldwide to deliver resilient, future-ready solutions that power innovation. With continuous learning, career growth, and a supportive culture, IBM provides the opportunities to build expertise and shape the infrastructure that drives progress.





Your role and responsibilities
  • Develop on- and off-chip network microarchitectures for data and coherence transport that meet KPIs for next-generation SMP.
  • Work closely with Cache/Nest PD architect to specify structures/topologies that are logically and physically realizable by the development team by the target tape-out date.
  • Modify/develop cache coherence protocol that best supports coherence transport topology.
  • Develop improvements to L2 and LLC micro architectures that improve KPIs.
  • Work with core architects to develop improvements to L2-core interface and interactions that improves KPIs.


Required education
Bachelor's Degree

Preferred education
Master's Degree

Required technical and professional expertise
  • Minimum 12 to 15 years of relevant experience with MS/PhD
  • Hands-on RTL level experience of architecting and delivering Coherency features in processor
  • Expertise in cache coherence protocols for symmetric multiprocessors (SMP), coveringboth chip SMP and multi-socket SMP
  • Experience with NuCA / NuMA (Non-uniform Cache / Memory architecture) architecturesand implementations
  • Experience in working with Core architecture/ FW/ SW teams
  • Exposure to System architecture


Preferred technical and professional experience

* Firmware Development Skills: Proficiency in firmware development, including programming languages, software development methodologies, and testing techniques, with the ability to integrate firmware into hardware systems.





Years of Experience:
12-15




This job post has been translated by AI and may contain minor differences or errors.
You’ve reached the maximum limit of 15 job alerts. To create a new alert, please delete an existing one first.
Job alert created for this search. You’ll receive updates when new jobs match.
Are you sure you want to unapply?

You'll no longer be considered for this role and your application will be removed from the employer's inbox.